The present invention relates to techniques for computing logarithm and power (exponentiation) functions using hardware specific instructions.
Fast and energy efficient computation is important in many computing applications. The particular computations to be performed vary depending upon the application. For example, so-called “big data” applications and data in motion applications may compute logarithmic and power functions. Examples of such applications may include deep learning, neural network simulations, as well as the modeling of dynamic systems such as population growth, electrical circuits, cardiovascular networks, optimization problems, cryptography, and many others.
There are a number of well-known techniques for computing results using logarithm and power (exponentiation) functions. Such techniques may include Taylor series/expansions computations, look-up tables, manipulation in accordance with the IEEE-745 standards, combinations of these techniques, and others. Each of these techniques has advantages and disadvantages—some are quite complex and resource intensive, some are relatively inaccurate, etc. For example, computing logarithm and power (exponentiation) functions using general standardized or general purpose processors is usually relatively slow, and uses a relatively large amount of memory.
A need arises for a technique that provides the capability to evaluate logarithm and power (exponentiation) functions that provides improved speed and/or accuracy, and reduced memory usage.